1. Field of the Invention
This invention relates generally to interface circuits and, more particularly, to interface circuits for use in interfacing TTL circuits to CMOS circuits.
2. Description of the Prior Art
Complementary MOS (known as CMOS) is a comparitively recent entry in the IC field and is a logical continuation of PNP/NPN bipolar complementary pair transistor applications utilizing P-channel/N-channel field effect transistor technology.
CMOS circuits are attractive to use for many applications because the power requirements to operate these circuits are very low.
TTL circuits usually operate with a V.sub.CC of 5 Volts or less and a V output (high) for a logical "one" generally ranges from 2.4 to 3.5 Volts. Complementary MOS circuits on the other hand will operate with a V.sub.CC of from 3 to 15 volts with the switching threshold, V.sub.T, is approximately one-half of V.sub.CC. It is possible to drive some CMOS circuits directly from TTL circuit outputs when the V.sub.CC to both circuits is 5 Volts, however, pull up resistors may be required, and temperature limitations may also arise. Some series of CMOS circuits cannot be directly driven by TTL's, even at a V.sub.CC of 5 Volts because the V.sub.CC for the CMOS circuits is higher than 5 Volts (i.e., the CMOS 4000 Series). For CMOS circuits which require V.sub.CC 's of 10 and 15 Volts, it is not possible for TTL outputs to drive the CMOS input gates because in order to switch the CMOS input gate the required voltage of 2 V.sub.T for switching (7.5 Volts for a V.sub.CC of 10 Volts or about 10 Volts for a V.sub.CC of 15 Volts) is higher than the TTL V output (high).
In addition to the above suggested use of pull up resistors, which are generally used between V.sub.CC and the TTL output/CMOS input lead, CMOS designs for reduced logic thresholds have been used but these suffer from both initial voltage tolerance and improper changes with temperature.
Accordingly, a need existed to provide an interface circuit which could be incorporated in a CMOS chip for translating the logic outputs "1" or "0" from a TTL circuit into a "1" or "0" input acceptable to a CMOS circuit.